Final Product and UI demonstration

The final poduct rocked!!

 

Here is the screen capture of our GUI

ECG System

We proposed the ECG system as a combination of three firefly nodes with front end attached to each one of them. They transit samples of data 4 times per second to a gateway node which relays the information to a PC connected via RS232.

A resident MATLAB program in PC recognizes the data from each of the patches and plots three separate graphs. The GUI we made looked like the following.

The software front

The ADC driver and data transmission

 The ADC was configured to have the following characteristics
(1) ADC clock configured for 100 Hz sample rate
(2) Setting CPHA and CPOL both to 1
(3) ADC data is read from a thread that runs every 10 milliseconds
(4) we do a non-blocking wait for 8 milliseconds and a busy wait after that till the data is available.
Additionally, our ADC chip (AD7705) requires clock polarity (CPOL) and clock phase (CPHA) both set to 1 where as the radio chip (Chipcon CC2420) requires both of these bits set to 0. This necessitates a 'switch' between the two configurations when trying to talk to each one of them. We used enable ADC and disable ADC APIs in order to accomplish the same.

The MATLAB Code

MATLAB algorithm was developed to read in the real-time incoming data, as it came through the serial port, and employ digital signal processing techniques to achieve a coherent display of data. While using three nodes, the MATLAB function sorted through the incoming data by arranging the packets received by their associated node ID. Each node was assigned an identification number and was placed into a data vector exclusive to that node. 

A real time high pass filter was implemented to resolve drifts in the signal and retain a steady output from the leads. A cutoff frequency of 80 Hz was selected for the high pass filter.

Arrival of the ECG Front End Boards

After our evaluation board worked well, we did our PCB layout in cadence and got our board fabricated from Malaysia. The boards arrived after a week and a half. We were surprised to get 10 of them when we had ordered for 6, for no additional cost :) We had our names printed on the made and we were proud of them.


The front side view.

 

And the back side view. It has our names on it :)

Formfactor Design and Packaging

As the scope of our project implied, the ECG patch should essentially be as small as possible and follow the contours of the body.  Also, the patch should be attached to the patient for up to two weeks (WOW THAT'S INCREDIBLE!) and concealed under their clothing.  This yields such design constraints to develop a bandage-like enclosure that fully encompasses the firefly circuit, customized ADC PCB, and and Li-ion battery.  The bandage would serve as an exceptional prototypical bonding platform because of its adhesive properties. 

Future design iterations could include a flexible battery and circuit as opposed to the rigidity of the current boards.

And it clicked - the board design

Ben got up on November 9 with a NOVEL idea that some witch gave him in his dream. We were trying to make our ECG sleek and the same time did not want to mess up with the existing firefly design. We would say, Ben's dream was really helpful in achieving this. This is how Ben's dream looked like -

After some good times with cadence we came up with the following board design:
<pic-board design>

Planting the seed - Making the evaluation board

We designed the following two versions of the evaluation ecg patch with the components mentioned along with it. Both of these were placed on the SPI header on the firefly node.
 (a) The minimal version had just the ADC (which needs a crystal and a few capacitors) and it looked like the following

(b) The full fledged version had the whole circuit implemented.

The following were the pin configuration changes made on firefly board:-
ADC Data ready PIN was mapped to PORT E PIN4
ADC Chip Select PIN was mapped to PORT E PIN5

We wrote the ADC driver on top of the SPI driver on nano-RK. The adc driver had the following characteristics:-
(a) ADC clock configured to 100 Hz
(b) the ADC data was read by the nano-RK task at 10 ms
(c) Data was collected in a buffer and sent to the UART simultaneously.

Problem that we go stuck up for a long time: Using ADC and Radio at the same time. When we used bmac APIs along with our ADC driver in our task, it just wouldnt work!! We think the problem is because of simultaneously using SPI for both the functionalities